Who
Dr. Marina Vemmou
School of Computer Science, Georgia Tech
When
24 Sep 2026, 11:00 Athens time, Science Building 145Π58
Title
Building Adaptive Datacenters: A Case For More Expressive And Elastic Interfaces
Abstract
The performance of a datacenter server is increasingly set less by its components than by the interfaces between them. CPUs, NICs, caches and memory are provisioned independently and coordinate only through narrow, static interfaces that encode expectations reasonable at the time they were formed. The separation of concerns has enabled decades of independent innovation. But as network bandwidth has grown to rival memory bandwidth and CPUs have come to sit between heterogeneous workloads and heterogeneous memory technologies, those interfaces become the binding constraint, leaving performance unused that the hardware is fully capable of delivering.
Two properties determine whether an interface can keep up: expressiveness, whether it carries the information components actually need to coordinate, and elasticity, whether it can adapt at runtime rather than being fixed at design time. In this talk, I will show how enriching interfaces along these two axes unlocks performance already latent in the hardware. I will begin with Sweeper, which makes the interface between the network stack and the cache hierarchy more expressive. Placing incoming network traffic directly in the cache was meant to keep the network off the memory system, but the cache cannot tell when a buffer has been consumed, so it writes finished network data back to memory and spends bandwidth that co-located applications need. Sweeper lets software signal buffer liveness to the hardware, so the cache can drop those lines instead. I will then present MORIA, which makes the interface between the cache and its miss-handling hardware elastic. The structures tracking outstanding misses are sized at design time and cap how many memory requests a core can sustain, stalling cores while cache capacity sits underused beside them. MORIA virtualizes miss-tracking state inside the cache data array, letting the cache expand its own tracking capacity on demand.
Together, these systems show that precisely targeted interface changes, not full system redesign, can recover substantial performance. I will conclude by outlining my agenda for the datacenter of the future, where AI serving increasingly sets the terms. Accelerators will handle much of that work, but general-purpose components will serve alongside them. I plan to investigate ways to make those components adaptive enough to run AI workloads efficiently without giving up their generality, in energy as well as performance.
About the Speaker
Marina Vemmou recently completed her Ph.D. at the Georgia Institute of Technology, advised by Alexandros Daglis. Her research spans computer architecture and systems, focusing on the hardware-software interfaces through which memory- and networking-intensive applications coordinate with the systems that serve them. She has three publications at MICRO, one of the top conferences in computer architecture, and has held research internships at NVIDIA Research and Microsoft Research. She received the Georgia Tech SCS Incubator Graduate Fellowship and the Georgia Tech CoC Outstanding Graduate Teaching Assistant Award. Her overarching goal is to design hardware and software interfaces that let general-purpose datacenter components adapt to emerging workloads like agentic AI, with an emphasis on energy efficiency.
