The article of K. Papadimitriou, A. Dollas, S. Hauck, entitled "Performance of Partial Reconfiguration in FPGA Systems: A Survey and a Cost Model" is amongst the top-5 cited articles of all time in the ACM Transactions on Reconfigurable Technology and Systems, as reported in it's website. The journal is focused on research in, on, and with reconfigurable systems and the underlying technology that supports these systems. The article presents part of the research and results in the PhD thesis of Kyprianos Papadimitriou.
Fine-grain reconfigurable devices suffer from the time needed to load the configuration bitstream. Even for small bitstreams in partially reconfigurable FPGAs this time cannot be neglected. In this article we survey the performance of the factors that contribute to the reconfiguration speed. Then, we study an FPGA-based system architecture and with real experiments we produce a cost model of Partial Reconfiguration (PR). This model is introduced to calculate the expected reconfiguration time and throughput. In order to develop a realistic model we take into account all the physical components that participate in the reconfiguration process. We analyze the parameters that affect the generality of the model and the adjustments needed per system for error-free evaluation. We verify it with real measurements, and then we employ it to evaluate existing systems presented in previous publications. The percentage error of the cost model when comparing its results with the actual values of those publications varies from 36% to 63%, whereas existing works report differences up to two orders of magnitude. Present work enables a user to evaluate PR and decide whether it is suitable for a certain application prior entering the complex PR design flow.